#include "sys_hc32f460.h"
#include "hc32f460_clk.h"
#include "stdio.h"



void HC32F460_SYSCLK_Init(void){
	stc_clk_mpll_cfg_t   stcMpllCfg;
    en_clk_sys_source_t  enSysClkSrc;
    stc_clk_sysclk_cfg_t stcSysClkCfg;

    MEM_ZERO_STRUCT(enSysClkSrc);
    MEM_ZERO_STRUCT(stcSysClkCfg);
    MEM_ZERO_STRUCT(stcMpllCfg);

    /* Set bus clk div. */
    stcSysClkCfg.enHclkDiv  = ClkSysclkDiv1;
    stcSysClkCfg.enExclkDiv = ClkSysclkDiv2;
    stcSysClkCfg.enPclk0Div = ClkSysclkDiv1;
    stcSysClkCfg.enPclk1Div = ClkSysclkDiv2;
    stcSysClkCfg.enPclk2Div = ClkSysclkDiv4;
    stcSysClkCfg.enPclk3Div = ClkSysclkDiv32;
    stcSysClkCfg.enPclk4Div = ClkSysclkDiv2;
    CLK_SysClkConfig(&stcSysClkCfg);

    /* Switch system clock source to MPLL. */
    CLK_HrcCmd(Enable);//使能HRC时钟
	
    /* MPLL config. */
    stcMpllCfg.pllmDiv = 2u; 
    stcMpllCfg.plln = 25u;   
    stcMpllCfg.PllpDiv = 2u; 
    stcMpllCfg.PllqDiv = 2u; 
    stcMpllCfg.PllrDiv = 2u; 
    CLK_SetPllSource(ClkPllSrcHRC);
    CLK_MpllConfig(&stcMpllCfg);

    /* flash read wait cycle setting */
    EFM_Unlock();
    EFM_SetLatency(EFM_LATENCY_4);
    EFM_Lock();

    /* Enable MPLL. */
    CLK_MpllCmd(Enable);

    /* Wait MPLL ready. */
    while (Set != CLK_GetFlagStatus(ClkFlagMPLLRdy))
    {
    }

    /* Switch system clock source to MPLL. */
	PWC_HS2HP();
	
    CLK_SetSysClkSource(CLKSysSrcMPLL);
	SysTick_Init(1000);
	
}

void HC32F460_SYSCLK_Low_Power_Init(void){
	stc_clk_mpll_cfg_t   stcMpllCfg;
    en_clk_sys_source_t  enSysClkSrc;
    stc_clk_sysclk_cfg_t stcSysClkCfg;

    MEM_ZERO_STRUCT(enSysClkSrc);
    MEM_ZERO_STRUCT(stcSysClkCfg);
    MEM_ZERO_STRUCT(stcMpllCfg);

    /* Set bus clk div. */
    stcSysClkCfg.enHclkDiv  = ClkSysclkDiv1;
    stcSysClkCfg.enExclkDiv = ClkSysclkDiv2;
    stcSysClkCfg.enPclk0Div = ClkSysclkDiv1;
    stcSysClkCfg.enPclk1Div = ClkSysclkDiv2;
    stcSysClkCfg.enPclk2Div = ClkSysclkDiv4;
    stcSysClkCfg.enPclk3Div = ClkSysclkDiv1;
    stcSysClkCfg.enPclk4Div = ClkSysclkDiv2;
    CLK_SysClkConfig(&stcSysClkCfg);

    /* Switch system clock source to MPLL. */
    CLK_HrcCmd(Enable);//使能HRC时钟
	
    /* MPLL config. */
    stcMpllCfg.pllmDiv = 4u; 
    stcMpllCfg.plln = 30;   
    stcMpllCfg.PllpDiv = 6u; 
    stcMpllCfg.PllqDiv = 2u; 
    stcMpllCfg.PllrDiv = 2u; 
    CLK_SetPllSource(ClkPllSrcHRC);
    CLK_MpllConfig(&stcMpllCfg);

    /* flash read wait cycle setting */
    EFM_Unlock();
    EFM_SetLatency(EFM_LATENCY_4);
    EFM_Lock();

    /* Enable MPLL. */
    CLK_MpllCmd(Enable);

    /* Wait MPLL ready. */
    while (Set != CLK_GetFlagStatus(ClkFlagMPLLRdy))
    {
    }

    /* Switch system clock source to MPLL. */
	PWC_HS2HP();
	
    CLK_SetSysClkSource(CLKSysSrcMPLL);
	SysTick_Init(1000);
}


void HC32F460_Stop_Init(void){
	stc_pwc_stop_mode_cfg_t stcPwcStopCfg;
	MEM_ZERO_STRUCT(stcPwcStopCfg);
	stcPwcStopCfg.enStpDrvAbi = StopHighspeed;
	stcPwcStopCfg.enStopClk = ClkFix;
	stcPwcStopCfg.enStopFlash = Wait;
	stcPwcStopCfg.enPll = Enable;
	while(Ok != PWC_StopModeCfg(&stcPwcStopCfg)){;}
}


void HC32F460_Stop_In(void){
	PWC_EnterStopMd();
	HC32F460_SYSCLK_Init();
}

void Soft_Reset(void){
	NVIC_SystemReset();
}

void jlink_Disable(void){
	PORT_Unlock();
	M4_PORT->PSPCR  = 0x03u;
	PORT_DebugPortSetting(TDI,Disable);
	PORT_Lock();
}
